pub fn plan_sibling_table(cpu_to_core: &[(u32, u32)]) -> SiblingPlanExpand description
Plan the SMT sibling table from a synthetic (cpu, core) map.
Each CPU’s entry is the lowest-id other CPU sharing its physical
core (the core_id from scx_utils::Cpu). A core with a single CPU
maps that CPU to itself, the “no sibling” sentinel the BPF side
treats as “no preference”. smt_on is set when any entry is a
non-self sibling. For >2-way SMT only the lowest-id sibling is
reported. This is a preference, not a full pairing, and the input
order does not matter (the plan groups by core first).